using System;
using System.Collections.Generic;
using System.Text;

namespace RapidHDL
{
    public class FPGAInterface
    {
        protected long lClockCycles;
        protected bool bClockRunning = false;

        public virtual bool IsClockRunning()
        {
            return bClockRunning;
        }

        public virtual bool StartClock()
        {
            return true;
        }

        public virtual bool StopClock()
        {
            return true;
        }

        public virtual int ReadMemory(int piAddress)
        {
            return -1; 
        }
     

        public virtual bool WriteMemory(int piAddress, int piValue)
        {
            return false;
        }

        public virtual bool Reset()
        {
            lClockCycles = 0;
            return false;
        }

        public virtual bool Go(int piClockCycles)
        {
            lClockCycles += piClockCycles;
            return false;
        }

        public virtual string Start()
        {
            return "No FPGA interface defined";
        }

        public virtual bool Stop()
        {
            return false;
        }

        public long ClockCycles
        {
            get
            {
                return lClockCycles;
            }
        }
    }
}
